Professional Summary
Software Engineer with a PhD in Computer Science
I am focused on Code Quality. I deliver the right things, done right!
I am passionate about Computers and Sci-Fi. I am curious. I like to explore. I like to constantly learn, to improve myself. I like to take on hard challenges. I am serious, dedicated, with a strong expertise in back-end applications. I like to be as professional as I can. I am an aspiring Software Craftsman.
With a PhD in Computer Science, I started since 2008 to explore, study and research in the field of Artificial Intelligence (AI). Currently I am a Software Engineer at Visma. I promote Clean (Hexagonal) Architecture, the API-First approach to building Products, Trunk Based Development.
I have a DevSecOps mindset.
Work Experience
My professional journey and key roles
Working as a Software Engineer for Visma Connect.
Key Achievements
- Architected and developed (from scratch) a new mobile Authenticator app, for Android and iOS, with Flutter. It allows users to sign in with push notifications. The app available in Google Play and Apple App Store.
Served as Software Architect for the Visma.net Platform.
Key Achievements
- Effectively migrated legacy software systems into Cloud Native software systems.
- Rewritten APIs to be standardised, using the OpenApi Specification.
- Migrated applications from Payara to Spring Boot (and Java 8 to Java 17).
- Rewritten the entire delivery pipeline with Amazon Web Services (AWS) Developer Tools and GitHub Actions. We obtained an end-to-end automated CI/CD pipeline that drastically improved the Delivery Lead Time.
- Architected systems to use AWS Fargate instead on AWS EC2. Promoted the use of AWS Lambda (Python and Node.js runtimes), SQS, SNS, AWS API Gateway, CloudWatch, X-Ray.
- Architected a scalable mocking solution solely based on AWS. This replaced a cumbersome monolith used to mock several APIs.
- I improved the collaboration in the Development Team.
- I significantly improved the observability of the entire Platform.
Worked as Senior Software Developer for the Visma.net Platform.
Key Achievements
- Drastically increased the Code Quality by using Quality Gates with SonarQube, and by promoting better testing processes.
- Process for keeping all systems up to date, from a security perspective, by using services like Snyk, Coverity and GitHub Dependabot.
As a Software Engineer in the Research & Development Department of Ropardo, I did research activities in several FP7 European projects. I also worked as Lead Software Developer and Software Architect as Contractor for IBM.
I conducted laboratory classes and Linux administration of the "Lucian Blaga" University High Performance Computing (HPC) System.
As a member of the Advanced Computer Architecture & Processing Systems (ACAPS) research lab, I researched the application mapping problem for Network-on-Chip (NoC) architectures, through UniMap, which is a unified framework for NoC application mapping research (developed by me, as part of my PhD thesis). I was also interested in performing an Automatic Design Space Exploration of NoC designs, multicore and manycore architectures.
Key Achievements
- Successfully publicly defended my PhD thesis entitled "Optimized Algorithms for Network-on-Chip Application Mapping" on November 25th 2011, supervised by Professor Lucian Vinţan.
I developed a Network-on-Chip simulator.
My main activities included software development (mainly in Java), software development life cycle, software documentation development (user guides), and database implementation (Oracle, MSSQL, Apache Derby).
Education
Academic background and qualifications
Optimized Algorithms for Network-on-Chip Application Mapping
Defended on November 25th, 2011
Research Focus
As a member of the Advanced Computer Architecture & Processing Systems (ACAPS) research lab, I researched the application mapping problem for Network-on-Chip (NoC) architectures, through UniMap, which is a unified framework for NoC application mapping research (developed by me, as part of my PhD thesis). I was also interested in performing an Automatic Design Space Exploration of NoC designs, multicore and manycore architectures.
Key Contributions
- Development of the UniMap framework for NoC application mapping
- Novel algorithms for optimizing communication in NoC architectures
- Automatic design space exploration techniques for multicore systems
- Performance evaluation and comparison with existing mapping approaches
Engineering degree in Computer Science.
High school education with focus on Mathematics and Information Technology.
Skills & Expertise
Technical skills and professional competencies
Certifications
Professional certifications and credentials
Research Areas
My primary research focuses on Network-on-Chip architectures and Artificial Intelligence
Network-on-Chip Architectures
Researching communication infrastructure for multi-core processors through the UniMap framework
Application Mapping
Developing optimized algorithms for efficient mapping of applications to NoC architectures
Artificial Intelligence
Exploring and researching in the field of Artificial Intelligence since 2008
Research Publications
Academic publications from my research
Proceedings of the 9th ACM International Conference on PErvasive Technologies Related to Assistive Environments
This paper presents an assistive system for human-exoskeleton interaction, focusing on improving mobility and rehabilitation for users with physical disabilities.
Recent Developments in Computational Collective Intelligence, 187-196
This paper presents a cloud-based group decision support system that facilitates collaborative decision-making processes in distributed environments.
Neurocomputing 146, 151-163
This paper presents a stigmergic approach for designing social interactions in collaboration engineering, inspired by self-organizing principles observed in nature.
Digital Human Modeling. Applications in Health, Safety, Ergonomics and Risk Management
This paper presents an integrated architecture for next-generation mobile health services targeting teenagers, focusing on education, monitoring, and prevention.
Microprocessors and Microsystems 37 (1), 65-78
This paper presents domain-knowledge evolutionary algorithms for optimizing application mapping in Network-on-Chip architectures, leveraging specific domain expertise to improve performance.
Advances in Intelligent Control Systems and Computer Science, 473-487
This paper presents a domain-knowledge optimized simulated annealing approach for Network-on-Chip application mapping, incorporating specific domain expertise to enhance the optimization process.
14th International conference on modern information technology in the innovation processes of the industrial enterprises
This paper presents a practical implementation of the Virtual Factory Framework, demonstrating its application in industrial settings for improved manufacturing processes.
Joint Virtual Reality Conference of ICAT, EGVE and EuroVR, 2012
This paper presents a 3D virtual meeting tool integrated with factory environments, enabling remote collaboration and assessment in manufacturing settings.
Proceedings of the 18th International Conference on Control Systems and Computer Science
This paper presents an Optimized Simulated Annealing (OSA) algorithm that deals with the topological placement of cores onto NoC nodes. The algorithm is derived from a general energy- and performance-aware Simulated Annealing and employs and adapts some of the best Simulated Annealing practices from the field of task scheduling.
Acta Universitatis Cibiniensis Technical Series
This paper outlines the main contributions of an ongoing PhD research, which addresses the Network-on-Chip application mapping problem. It presents UniMap, a framework that evaluates and optimizes algorithms for Network-on-Chip application mapping, through a unified approach.
9th RoEduNet IEEE International Conference, 259-264
This paper presents a preliminary PhD research towards developing a framework to evaluate and optimize application mapping algorithms for Network-on-Chip architectures.
ACACES 2010 Poster Abstracts, 163-166
This paper proposes a unified framework for evaluating and optimizing Network-on-Chip application mapping algorithms, providing a standardized approach for comparison and improvement.
ACACES 2009 Poster Abstracts, 151-154
This paper explores research opportunities in multicore architectures, presenting initial investigations and potential directions for future work.
The 6th EUROSIM Congress on Modeling and Simulation
This paper presents an interactive graphical trace-driven simulator for teaching branch prediction in computer architecture courses. The simulator helps students understand the importance of branch prediction in modern superscalar microarchitectures and provides a wide variety of configuration options.
Proceedings of 9th International Symposium on Automatic Control and Computer Science
This paper presents the design of an advanced simulator for unbiased branches prediction, focusing on identifying and addressing the challenges of predicting branches with low polarization.
This paper focuses on understanding and predicting unbiased branches in general-purpose applications, analyzing their characteristics and developing prediction techniques.
Contact Me
Get in touch for professional opportunities or research collaborations